Determining whether thread fetch operation will be blocked...

Electrical computers and digital processing systems: processing – Instruction fetching

Reexamination Certificate

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C712S229000, C718S103000, C718S107000

Reexamination Certificate

active

07010669

ABSTRACT:
In a multi-threaded processor, thread priority variables are set up in memory. According to an embodiment of the present invention, several conditions are monitored so as to determine an indication of instruction side starvation may be approaching. If such starvation is approaching, the starvation is resolved upon the expiration of a threshold counter or the like.

REFERENCES:
patent: 6018759 (2000-01-01), Doing et al.
patent: 6535905 (2003-03-01), Kalafatis et al.
patent: 6542921 (2003-04-01), Sager
patent: 6748593 (2004-06-01), Brenner et al.

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