Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
Reexamination Certificate
2006-10-25
2009-11-24
Ll, Aimee J (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Reexamination Certificate
active
07624253
ABSTRACT:
A data processing apparatus2supports out-of-order processing register renaming using a renaming stage8. A set of physical registers16is mapped to architectural registers. Available-register identifying logic26is used to identify which physical registers16are available for use by the renaming stage8. The available-register identifying logic26includes an instruction FIFO28storing register mapping data for unresolved instructions and indicating physical registers16storing data values which may be required in association with those unresolved speculative instructions. The speculative instructions may be predicted branch instructions, load/store instructions, conditional instructions or other types of instruction.
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Airaud Cédric Denis Robert
Begon Florent
Lataille Norbert Bernard Eugéne
Vincent Mélanie
ARM Limited
Ll Aimee J
Nixon & Vanderhye P.C.
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