Determining analog error using parallel path sampling

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

Reexamination Certificate

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C341S156000, C341S172000, C327S540000, C327S538000

Reexamination Certificate

active

06977600

ABSTRACT:
A method for determining analog error of a signal includes receiving an input signal and sampling the input signal to generate a first sampled signal. The method also includes communicating the first sampled signal using a first communication path and a second communication path and sampling the first sampled signal from the first communication path to generate a second sampled signal. The method further includes converting the first sampled signal from the second communication path into a digital signal, storing the digital signal using a digital memory, comparing the second sampled signal to the digital signal, and determining an analog error of the input signal based on the comparison.

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Bracey, et al., “A 70 MS/s 8-Bit Differential Switched-Current CMOS A/D converter Using Parallel Interleaved Pipelines” pp. 143-146, © 1995IEEE.

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