Determination of memory bank sizes in a computer system

Details Determination of memory bank sizes in a computer system Determination of memory bank sizes in a computer system

1995-06-07

1998-04-07

Gossage, Glenn

Excavating

39549703, 371 212, 36523003, G06F 1206, G06F 1200

Patent

active

057375631

ABSTRACT:
A method and circuitry for testing a memory in a computer system, to determine the sizes of individual memory banks, is disclosed. The disclosed circuitry is provided within a memory controller unit of a microprocessor unit, and includes circuitry for enabling the selection of an individual memory bank of a memory, such as dynamic random access memory, which is arranged as multiple banks of arbitrary size. In operation, a memory bank is selected, and a first data word is written to the bottom memory address of the bank (which, for banks other than the first bank, is the top memory address of the previous bank). A second data word is written to a second memory location that is spaced apart from the bottom address by a trial value of the bank size. If the trial bank size is too small, the second data word will not overwrite the bottom address; if the trial bank size is accurate, however, the second data word will overwrite the bottom address, following which a register entry is made for the selected bank to indicate that its top memory address is the bottom address plus the determined bank size. The microprocessor unit may be integrated onto a single integrated circuit chip with the memory controller, and may include a first level write-through cache in combination with a significantly smaller second level write-back cache. The disclosed microprocessor unit also includes circuitry for controlling the access to configuration registers, and circuitry for determining memory address type.

REFERENCES:
patent: 4592011 (1986-05-01), Mantellina et al.
patent: 4739473 (1988-04-01), Ng et al.
patent: 5040153 (1991-08-01), Fung et al.
patent: 5179686 (1993-01-01), White
patent: 5274768 (1993-12-01), Traw et al.
patent: 5287531 (1994-02-01), Rogers, Jr. et al.
patent: 5301292 (1994-04-01), Hilton et al.
patent: 5307320 (1994-04-01), Farrer et al.
patent: 5317709 (1994-05-01), Sugimoto
patent: 5408129 (1995-04-01), Farmwald et al.
patent: 5511180 (1996-04-01), Schieve
patent: 5513331 (1996-04-01), Pawlowski et al.
patent: 5568651 (1996-10-01), Medina et al
Linley Gwennap, Microprocessor Report , "TI Shows Integrated X86 CPU for Notebooks", vol. 8, No.2. Feb. 14, 1994, pp. 5-7.
ACC Micro, ACC 2056 3.3V Pentium Single Chip Solution for Notebook Applications, Rev. 1.1, pp. 1-1-1-10 .
ACC Micro, ACC 2066 486/386DX Notebook Enhanced-SL Single Chip AT, Rev. 1.2, Oct. 11, 1993 pp. 1-1-1-10.
PicoPower, Redwood Technical Reference Manual,Databook 3.OP, Jul. 8, 1994, pp. i-iv, 18, 19, 87-89.
ACC Micro, ACC Microelectronics Product Guide.
VIA Technologies, Inc., Energy Star-Compliant System Logic Solutions, Brochure.
OPTi, 82C895 Single Chip True Green PC Chipset.
EFAR, EC802G One Chip32 Bits PC/AT Core Logic, Technical Reference Manual, 1994, 11-14, 25,29.
ETEQ Micro, Buffalo ET 9000, 486 Write Back Cache "AT" Single Chip, Rev 03, May 1994, pp. 1-8.
ETEQ Micro, Panda 82C390SX, Single Chip 386 SX Direct Mapped Cache solution, Rev 0.1, Oct. 1991, pp. 1-4, Rev.0.2, Apr. 1992, pp. 5-10.
EFAR, SWIFT-IDE, 386 Chip UP grade 486, POWERset Pentium PCI/ISA Chip Set, 1994.
OPTIi, Blackhawk 486 Desktop Chipset
OPTi Python Chipset for Pentium Processors, 82C546 & 82C547 Data Book, Version 1.0, May 1994, pp. 1-3, 37,38,41,43,45-52,65,66,69,70,72.
Symphony Laboratories, Wagner 486 PC/AT Chip Set, Rev A.2,Features, Block Diagram, pp. 1-1-1-8.
UMC Super Energy Star Green File, Version 4.0, Preliminary UM8881F/8886F, Apr. 15, 1994, pp. 1, 7-18.
UMC Super Engergy Star Green File, Version 4.0, Preliminary UM8498F/8496F/82C495F, Apr. 15, 1994, pp. 1-3, 17-19.
UMC Super Energy Star Green File, Version 4.0, Preliminary UM8486F, Apr. 15, 1994, pp. 6-8, 17-19.
OPTi Viper Notebook Chipset, Preliminary Data Book, Ver.0.2, 82C556/82C557/82C558N, Jun. 1994, pp. 1-5, 46-67.
Texas Instruments, TACT84500 EISA Chip Set, Designer's Handbook, 1991, pp. 3-1-3-4, 3-42-3-44.
OPTi 82C802G, System/Power Management Controller, Mar. 1994, pp. 1-14, 19-22,37.
OPTi 82C596/82C597, Cobra Chipset for Pentium Processors Data Book, Rev. 1.0, Oct. 1994, pp. 1-3, 35-51.
Texas Instruments, TACT84411 Single-Chip 80486 Systems Logic, 1993, pp. 1-1-5, 2-1, 2-2, 4-1-4-15, 5-28.

Affiliated with

Also associated with

Rating

Determination of memory bank sizes in a computer system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Determination of memory bank sizes in a computer system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Determination of memory bank sizes in a computer system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-24812