Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2001-07-13
2002-10-29
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
With measuring or testing
C438S216000, C438S275000
Reexamination Certificate
active
06472236
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to metal oxide semiconductor (MOS) devices, and more particularly, to a mechanism for determining the respective effective oxide thickness of each of a plurality of dielectric materials forming a MOS (metal oxide semiconductor) stack.
2. Discussion of the Related Art
Referring to
FIG. 1
, in a MOS (metal oxide semiconductor) stack
100
, a conductive structure
102
comprised of a metal (or other types of conductive material such as polysilicon for example) is formed on a high-K structure
104
comprised of a dielectric material having a dielectric constant higher than that of silicon dioxide (SiO
2
). An interfacial structure
106
is disposed between the high-K structure
104
and the semiconductor substrate
103
to provide a smooth structural transition from the high-K structure
104
to the semiconductor substrate
103
. The high-K structure
104
has a first thickness T
1
, and the interfacial structure
106
has a second thickness T
2
.
For example, the conductive structure
102
is comprised of aluminum, the high-K structure
104
is comprised of a metal oxide, the semiconductor substrate
103
is comprised of silicon, and the interfacial structure
106
is comprised of silicon dioxide (SiO
2
). The high-K structure
104
comprised of a dielectric material having a dielectric constant higher than that of silicon dioxide (SiO
2
) is used as MOS device dimensions are further scaled down including the thickness of the dielectric materials between the conductive structure
102
and the semiconductor substrate
103
. For a given capacitance, a dielectric material with a higher dielectric constant has a higher thickness.
When the high-K structure
104
is comprised of a dielectric material having a dielectric constant higher than that of silicon dioxide (SiO
2
), a higher thickness of the dielectric materials (including the high-K structure
104
and the interfacial structure
106
) between the conductive structure
102
and the semiconductor substrate
103
is used than if simply silicon dioxide (SiO
2
) alone were to be used. A higher thickness of the dielectric materials between the conductive structure
102
and the semiconductor substrate
103
is advantageous for minimizing tunneling current through such dielectric materials. As MOS device dimensions are scaled down such that the thickness of the dielectric materials between the conductive structure
102
and the semiconductor substrate
103
is in a range of tens of angstroms, tunneling current may be a significant source of undesired leakage current for the MOS device.
With formation of the dielectric stack including the interfacial structure
106
and the high-K structure
104
, determination of the respective effective oxide thickness of each of the interfacial structure
106
and the high-K structure
104
is desired in integrated circuit design. However, as MOS device dimensions are scaled down including the thickness of the dielectric materials
104
and
106
between the conductive structure
102
and the semiconductor substrate
103
, conventional prior art techniques for measuring the thickness of the dielectric materials
104
and
106
of the MOS stack
100
may not be accurate.
SUMMARY OF THE INVENTION
Accordingly, in a general aspect of the present invention, the respective effective oxide thickness of each of a plurality of dielectric materials forming MOS stacks are determined electrically by forming a plurality of test MOS (metal oxide semiconductor) stacks.
In a general aspect of the present invention, in a system and method for determining a respective effective oxide thickness for each of a first dielectric structure comprised of a first dielectric material and a second dielectric structure comprised of a second dielectric material that form a MOS (metal oxide semiconductor) stack, a first plurality of test MOS (metal oxide semiconductor) stacks are formed. Each test MOS stack is comprised of a respective first dielectric structure comprised of the first dielectric material and a respective second dielectric structure comprised of the second dielectric material.
A respective deposition time for forming the respective first dielectric structure corresponding to each of the first plurality of test MOS stacks is varied such that a respective first effective oxide thickness of the respective first dielectric structure varies for the first plurality of test MOS stacks. A respective second effective oxide thickness of the respective second dielectric structure is maintained to be substantially same for each of the first plurality of test MOS stacks. A respective total effective oxide thickness, EOT
MOS
, is measured for each of the first plurality of test MOS stacks. A first graph having total effective oxide thickness as a first axis and having deposition time for forming the first dielectric structure as a second axis is generated by plotting the respective total effective oxide thickness, EOT
MOS
, versus the respective deposition time for forming the respective first dielectric structure for each of the first plurality of test MOS stacks. The respective second effective oxide thickness of the respective second dielectric structure that is substantially same for each of the first plurality of test MOS stacks is determined from an intercept of the first axis of total effective oxide thickness when deposition time for forming the first dielectric structure of the second axis is substantially zero in the first graph.
In another aspect of the present invention, the respective first effective oxide thickness of the respective first dielectric structure is determined for each of the first plurality of test MOS stacks by subtracting the respective second effective oxide thickness from the respective total effective oxide thickness, EOT
MOS
, for each of the first plurality of test MOS stacks.
In a further aspect of the present invention, an off-set to the second effective oxide thickness is determined by forming a second plurality of test MOS stacks. Each test MOS stack is comprised of a respective first dielectric structure comprised of the first dielectric material and a respective second dielectric structure comprised of the second dielectric material. A respective deposition time for forming the respective second dielectric structure corresponding to each of the second plurality of test MOS stacks is varied such that a respective second effective oxide thickness of the respective second dielectric structure varies for the second plurality of test MOS stacks. A respective first effective oxide thickness of the respective first dielectric structure is maintained to be substantially same for each of the second plurality of test MOS stacks.
A respective total effective oxide thickness, EOT
MOS
, is measured for each of the second plurality of test MOS stacks. A second graph having total effective oxide thickness as a first axis and having deposition time for forming the second dielectric structure as a second axis is generated by plotting the respective total effective oxide thickness, EOT
MOS
, versus the respective deposition time for forming the respective second dielectric structure for each of the second plurality of test MOS stacks. The respective first effective oxide thickness of the respective first dielectric structure that is substantially same for each of the second plurality of test MOS stacks is determined from an intercept of the first axis of total effective oxide thickness when deposition time for forming the second dielectric structure of the second axis is substantially zero in the second graph.
The respective second effective oxide thickness of the respective second dielectric structure for each of the second plurality of test MOS stacks is determined by subtracting the respective first effective oxide thickness from the respective total effective oxide thickness, EOT
MOS
, for each of the second plurality of test MOS stacks. The off-set is determined by comparing the respective first effective
Wang Zhigang
Yang Nian
Yang Tien-Chun
Advanced Micro Devices , Inc.
Choi Monica H.
Rocchegiani Renzo N.
Smith Matthew
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