Determination of dielectric constants of thin dielectric...

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters

Reexamination Certificate

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C324S762010, C324S765010, C438S591000, C438S216000, C438S261000, C438S287000, C438S782000

Reexamination Certificate

active

06486682

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to MOS (metal oxide semiconductor) devices, and more particularly, to a mechanism for determining the respective dielectric constant of each of the dielectric materials forming a MOS (metal oxide semiconductor) stack.
2. Discussion of the Related Art
Referring to
FIG. 1
, in a metal oxide semiconductor (MOS) stack
100
, a conductive structure
102
comprised of a metal (or other types of conductive material such as polysilicon for example) is formed on a high-K structure
104
comprised of a dielectric material having a dielectric constant higher than that of silicon dioxide (SiO
2
2
). An interfacial structure
106
is disposed between the high-K structure
104
and the semiconductor substrate
103
to provide a smooth structural transition from the high-K structure
104
to the semiconductor substrate
103
.
For example, the conductive structure
102
is comprised of aluminum, the high-K structure
104
is comprised of a metal oxide, the semiconductor substrate
103
is comprised of silicon, and the interfacial structure
106
is comprised of silicon dioxide (SiO
2
). The high-K structure
104
comprised of a dielectric material having a dielectric constant higher than that of silicon dioxide (SiO
2
) is used as MOS device dimensions are further scaled down including the thickness of the dielectric materials between the conductive structure
102
and the semiconductor substrate
103
. For a given capacitance, a dielectric material with a higher dielectric constant has a higher thickness.
When the high-K structure
104
comprised of a dielectric material having a dielectric constant higher than that of silicon dioxide (SiO
2
) is used, a higher thickness of the dielectric materials (including the high-K structure
104
and the interfacial structure
106
) between the conductive structure
102
and the semiconductor substrate
103
is used than if simply silicon dioxide (SiO
2
) alone were to be used. A higher thickness of the dielectric materials between the conductive structure
102
and the semiconductor substrate
103
is advantageous for minimizing tunneling current through such dielectric materials. As MOS device dimensions are scaled down such that the thickness of the dielectric materials between the conductive structure
102
and the semiconductor substrate
103
is in a range of tens of angstroms, tunneling current may be a significant source of undesired leakage current for the MOS device.
With formation of the dielectric stack including the interfacial structure
106
typically comprised of silicon dioxide (SiO
2
) and the high-K structure
104
, determination of the effective dielectric constant of the high-K structure
104
and of the interfacial structure
106
is desired. When the thicknesses of the high-K structure
104
and the interfacial structure
106
are scaled down to tens of angstroms, the effective dielectric constants for the dielectric materials of the high-K structure
104
and the interfacial structure
106
may deviate significantly from the dielectric constant of such dielectric materials in bulk.
SUMMARY OF THE INVENTION
Accordingly, in a general aspect of the present invention, the dielectric constants of the interfacial structure and the high-K structure forming a MOS (metal oxide semiconductor) stack are determined by forming test MOS (metal oxide semiconductor) stacks.
In a general aspect of the present invention, in a system and method for determining a first dielectric constant, e
1
, for a first dielectric material and a second dielectric constant, e
2
, for a second dielectric material forming a MOS (metal oxide semiconductor) stack, a first test MOS (metal oxide semiconductor) stack and a second test MOS (metal oxide semiconductor) stack are formed. The first test MOS stack has a first total effective oxide thickness, EOT
A
. The first test MOS stack includes a first interfacial structure comprised of the second dielectric material having the second dielectric constant, e
2
, and having a first interfacial thickness T
2A
. The first test MOS stack also includes a first high-K structure comprised of the first dielectric material having the first dielectric constant, e
1
, and having a first high-K thickness, T
1A
. The first interfacial structure is disposed on a semiconductor substrate, and the first high-K structure is disposed between the first interfacial structure and a first conductive structure.
Similarly, the second test MOS stack has a second total effective oxide thickness, EOT
B
. The second test MOS stack includes a second interfacial structure comprised of the second dielectric material having the second dielectric constant, e
2
, and having a second interfacial thickness T
2B
. The second test MOS stack also includes a second high-K structure comprised of the first dielectric material having the first dielectric constant, e
1
, and having a second high-K thickness T
1B
. The second interfacial structure is disposed on the semiconductor substrate, and the second high-K structure is disposed between the second interfacial structure and a second conductive structure.
After formation of the first and second test MOS stacks, the first total effective oxide thickness, EOT
A
, of the first test MOS stack and the second total effective oxide thickness, EOT
B
, of the second test MOS stack are measured. In addition, the first interfacial thickness, T
2A
, of the first interfacial structure and the first high-K thickness, T
1A
, of the first high-K structure are measured. Also, the second interfacial thickness, T
2B
, of the second interfacial structure and the second high-K thickness, T
1B
, of the second high-K structure are measured. The first dielectric constant, e
1
, and the second dielectric constant, e
2
, are then determined depending on relations between values of EOT
A
, T
1A
, and T
2A
, and between values of EOT
B
, T
1B
, and T
2B
.
For example, the relations between values of EOT
A
, T
1A
, and T
2A
and between values of EOT
B
, T
1B
, and T
2B
are as follows:
EOT
A
=T
1A
*(e
ox
/e
1
)+
T
2A
*(e
ox
/e
2
)
EOT
B
=T
1B
*(e
ox
/e
1
)+
T
2B
*(e
ox
/e
2
),
with e
ox
, being the dielectric constant of silicon dioxide (SiO
2
).
The present invention may be used to particular advantage when the first total effective oxide thickness, EOT
A
, of the first test MOS stack and the second total effective oxide thickness, EOT
B
, of the second test MOS stack are measured using a capacitance and voltage measurement system or a current and voltage measurement system. In addition, the first interfacial thickness, T
2A
, of the first interfacial structure and the first high-K thickness, T
1A
, of the first high-K structure are measured using a HRTEM (high resolution transmission electron microscopy) system, according to one embodiment of the present invention. Similarly, the second interfacial thickness, T
2B
, of the second interfacial structure and the second high-K thickness, T
1B
, of the second high-K structure are measured using a HRTEM (high resolution transmission electron microscopy) system, according to one embodiment of the present invention.
In this manner, the interfacial structures and the high-K structures of the first and second test MOS stacks are formed to be comprised of the first and second dielectric materials. The first dielectric constant, e
1
, for the first dielectric material and the second dielectric constant, e
2
, for the second dielectric material are determined from measuring the thickness parameters EOT
A
, T
1A
, T
2A
, EOT
B
, T
1B
, and T
2B
of the first and second test MOS stacks. Thus, the first dielectric constant, e
1
, for the first dielectric material and the second dielectric constant, e
2
, for the second dielectric material are effectively determined even when the interfacial structure and the high-K structure of a MOS stack are formed to be relatively thin in the range of tens of angstroms.
These and other features and advantages of the present invention will be better u

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