Detector circuit

Communications: electrical – Digital comparator systems

Patent

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Details

340166R, H04Q 300

Patent

active

040064581

ABSTRACT:
A unique sense circuit to implement a differential memory detector having increased sensitivity for reading the binary state of selected memory cells forming an array thereof. The detector, in a preferred embodiment, includes a circuit comprised of a plurality of metal oxide semiconductor field effect transistors fabricated from a layer of silicon on sapphire (SOS/FETs). The body node of each of a pair of SOS/FETs is respectfully connected to a data bus line of the memory array so as to form differential input nodes to the detector circuit. The instant detector circuit provides relatively large digital output signals from relatively small input signals supplied from the array of memory cells via the data bus lines.

REFERENCES:
patent: 3609661 (1971-09-01), Hennes

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