Electrical computers and digital processing systems: multicomput – Multicomputer synchronizing
Reexamination Certificate
2008-09-16
2008-09-16
Etienne, Ario (Department: 2157)
Electrical computers and digital processing systems: multicomput
Multicomputer synchronizing
C709S238000, C709S241000
Reexamination Certificate
active
10601158
ABSTRACT:
A system is provided that includes a memory204comprising a baseline topology216; and a processor208that selects, from the baseline topology216, first and second addresses associated with first and second routers224and228, respectively, wherein the first router224has an associated first hop count relative to a selected node200and the second router228an associated higher second hop count relative to the selected node200, transmit test packets having a time to live equal to or greater than the first hop count, receive responses associated with the test packets, and determine, based on the response, whether load balancing is in effect at the first router224.
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Bardzil Timothy J.
Hill Bruce W.
Rankine Alastair J.
Avaya Technology Corp.
Etienne Ario
Nano Sargon N
Sheridan & Ross P.C.
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