Communications: electrical – Digital comparator systems
Patent
1977-05-06
1979-03-06
Atkinson, Charles E.
Communications: electrical
Digital comparator systems
3401461AQ, G06F 1100, G08C 2500
Patent
active
041433548
ABSTRACT:
A method of error detection in a digital system in which at least one digit in every n (where n is an integer greater than two) is omitted from use as the "particular digit" in the comparison of succeeding particular digits in a received pattern with the combination in accordance with a predetermined function of at least two digits preceding the particular digit in question by a particular spacing. The pattern is a pseudo-random binary sequence of maximal length and every third digit is taken as the particular digit. Every digit forms part of a comparison whether as "particular digit" or as one of said "at least two digits preceding". Shift registers, means to divide digits between the shift registers, and modulo -2 adders are used to carry out the method.
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E. R. Berlekamp, Algebraic Coding Theory, McGraw-Hill Book Co., 1968, pp. 331-336.
Atkinson Charles E.
Post Office
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