Detection of catastrophic failure of dielectric, improper connec

Electricity: measuring and testing – Plural – automatically sequential tests

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324 54, 340518, 364550, 364557, G01R 3114, G01N 2500, G08B 2610

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045771499

ABSTRACT:
A first sensor for the detection of dielectric failure (by burning) within a multilayer printed circuit assembly comprises an isolated conductive layer. This first sensor is connected by a first diode to a single wire which also connects a second, temperature, sensor via a second diode (system ground is a return). A number, nominally 16, of such single wire connected sensor pairs are selectable in accordance with an externally (microprocessor) furnished address. During a first time period, an externally (microprocessor) selected interrogation of temperature causes a first, positive, voltage bias to be applied to the selected sensor pair resulting in a current linear with temperature (over the range of 0.degree. C. to 100.degree. C.) in the second sensor. This current is transformed to voltage, offset by 273.degree. Kelvin, amplified, and converted to a digital value for issuance to an external (microprocessor) requestor. During a second time period, an externally (microprocessor) selected interrogation of dielectric failure causes a second, negative, voltage bias to be applied to the selected sensor pair. Any current sensed--which represents failure shorts between the isolated conductive layer and any other voltage, ground, or signal within the multilayer printed circuit assembly--is transformed to voltage, amplified, digitalized and issued externally. If neither temperature nor dielectric leakage currents can be properly sensed, and especially for plural addressable sensor pairs upon the same printed circuit assembly, then the assembly is deemed to be unconnected or improperly pluggably connected.

REFERENCES:
patent: 2934704 (1960-04-01), Gootherts
patent: 3483555 (1969-12-01), Birard et al.
patent: 3636448 (1972-01-01), Nihaski et al.
patent: 3699432 (1972-10-01), Brown
patent: 3833853 (1974-09-01), Milford
patent: 4145620 (1979-03-01), Dice
patent: 4340886 (1982-07-01), Boldt et al.
patent: 4489312 (1984-12-01), Yoshizaki
Bozzey et al; Insulation Resistance Testing of Printed Circuit Boards; IBM Technical Disclosure Bulletin, vol. 24, No. 8, Jan. 1982, pp. 4202, 4203.

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