Detecting false-locking and coherent digital demodulation using

Pulse or digital communications – Receivers – Angle modulation

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375326, 375327, 375344, 375345, 329308, H04L 100

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active

054901766

ABSTRACT:
In a method of detecting false-locking the trains of clock signals corresponding to the two phase offset initially modulated trains of signals, the phase offset between said trains of clock signals is monitored, and false-locking is detected when the phase offset changes signal. Also, a method of demodulation implements this method of detecting false-locking. Also, a device for implementing the method of detecting false-locking contains a flip-flop in series with a monostable.

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IEEE Proceedings I. Solid-State & Electron Devices, vol. 137, No. 1, Feb. 1990, Stevenage, GB, pp. 25-32; P. B. Kenington et al.: "Novel acquisition-aid design for the split-loop phase-lock receiver."
Electronic Components and Applications, vol. 9, No. 2, 1989, Eindhoven, NL, p. 66-89; W. Rosink: "All-digital phase-locked loops using the 74HC/HCT297".

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