Desired speed signal memory circuit for an automobile speed cont

Motor vehicles – With means responsive to speed of vehicle for maintaining... – Including electrically actuated servomechanism

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Details

123102, 361242, 365149, B60K 3100

Patent

active

041967879

ABSTRACT:
A desired automobile speed signal memory circuit for an automobile speed control system to maintain actual automobile speed constant at a desired speed. The memory circuit memorizes an actual automobile speed signal at the moment a desired speed set switch is closed. This memorized automobile speed signal is then used as a reference signal by the automobile speed control system to keep the actual automobile speed constant. The memory circuit has a capacitor which memorizes the desired speed signal, a first FET which forms a memorization loop with the capacitor upon the closure of the desired speed set switch, and a second FET which supplies the memorized desired speed signal on the capacitor in an impedance conversion mode as the reference signal used by the automobile speed control system to maintain constant the speed of the automobile.

REFERENCES:
patent: Re27324 (1972-03-01), Granger
patent: 3599052 (1971-08-01), Carp
patent: 3895684 (1975-07-01), Nakane
patent: 4056157 (1977-11-01), Kawata
patent: 4094007 (1978-06-01), Minami

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