Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2002-08-21
2004-08-31
Mai, Son (Department: 2818)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S230080
Reexamination Certificate
active
06785186
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of memory address decoders, and particularly to address decoders for driving long wordlines of a memory device, for example, a flash memory device.
BACKGROUND OF THE INVENTION
To achieve high access speeds in memory arrays, including those of flash memory devices, addressed wordlines must be driven as fast as possible. Fast wordline decoder devices for long wordlines tend to require complex latch circuitry for properly driving the wordline. Such circuits draw considerable power. A less complex wordline decoder device which draws less power and occupies less die area is therefore desirable.
BRIEF SUMMARY OF THE INVENTION
In one aspect, the invention provides a wordline decoder and operating method having wordline decoding pass transistors, a latch for initiating the driving of a wordline in response to the pass transistors decoding a wordline, and an output buffer responsive to a switching state of the latch for driving the wordline. In an additional aspect of the invention, the wordline decoder includes a voltage pump and voltage sink for supplying operating voltage to the buffer. Since the wordline is divided by the output buffer, the buffer can be optimally designed for driving the wordline, while the latch can be optimally designed for switching speed.
REFERENCES:
patent: 5282167 (1994-01-01), Tanaka et al.
patent: 5412331 (1995-05-01), Jun et al.
patent: 5982701 (1999-11-01), Eto
Dickstein , Shapiro, Morin & Oshinsky, LLP
Mai Son
Micro)n Technology, Inc.
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