Descriptor burst read-ahead

Details Descriptor burst read-ahead Descriptor burst read-ahead

2005-01-18

2005-01-18

Jean, Frantz B. (Department: 2151)

Electrical computers and digital processing systems: multicomput

Network-to-computer interfacing

C709S234000, C710S035000

Reexamination Certificate

active

06845402

ABSTRACT:
A novel method of reading descriptors by a network interface is provided in a computer system having a host CPU and a memory containing descriptors arranged in a list. The method includes reading at least two descriptors in a single PCI bus transaction. The network interface comprises a PCI interface for providing connection to the system via a PCI bus, and descriptor management logic for reading descriptors from the memory via the PCI interface. The descriptor management logic is configured for reading more than one descriptor in a single PCI read transaction. After reading a first descriptor, the descriptor management logic reads a second descriptor following the first descriptor regardless of whether the second descriptor is owned by the network interface or the host CPU. The network interface performs a read operation to read a message buffer associated with the second descriptor if this descriptor is owned by the network interface. However, no reading of this message buffer is performed if the second descriptor is owned by the host CPU.

REFERENCES:
patent: 5751951 (1998-05-01), Osborne et al.
patent: 5870627 (1999-02-01), O'Toole et al.
patent: 5941952 (1999-08-01), Thomas et al.
patent: 6256693 (2001-07-01), Platko
patent: 6334162 (2001-12-01), Garrett et al.
patent: 6345345 (2002-02-01), Yu et al.

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