Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2006-03-07
2006-03-07
Rodriquez, Paul L. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S002000, C703S014000, C703S016000, C716S030000, C716S030000, C702S034000
Reexamination Certificate
active
07010475
ABSTRACT:
An integrated circuit development library is provided that characterizes several different logic device cells. The library specifies a number of different timing relationships for each of the logic device cells. These timing relationships are evaluated for each of the logic device cells at a first derating condition with a first simulator to provide a first set of derated condition values. The first set of derated condition values each correspond to one of the timing relationships evaluated. A first derating factor is calculated from the first set of derated condition values for estimating derated performance of an integrated circuit with a second simulator. This integrated circuit is developed from one or more of the logic device cells of the library.
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Koninklijke Philips Electronics , N.V.
Rodriquez Paul L.
Sharon Ayal
Zawilski Peter
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