Dequeue instruction in a system architecture for improved messag

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395876, G06F 946

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active

056029985

ABSTRACT:
A system and method for removing a queue entry containing message data from a queue shared by communicating, sequential processes includes dequeue (DEQ) and dequeue or wait (DEQW) instructions. The dequeue instruction removes a queue entry from the head of the shared queue, thereby providing access to the message data contained in the queue entry to the dequeuing process. The dequeue or wait instruction removes a queue entry from the shared queue if there is one, otherwise it suspends the execution of the dequeuing process until an entry is enqueued to the queue. If an event is selected by the dequeuing process, the dequeuing process is suspended until notification of the event is detected in the shared queue. Execution of the dequeue and dequeue or wait instructions include blocking access to the queue by other processes, updating queue linkages, deactivating processes waiting on entries or events being made to the queue, monitoring interrupts, and validating the appropriate queue data structures.

REFERENCES:
patent: 4394725 (1983-07-01), Bienvenu et al.
patent: 4649473 (1987-03-01), Hammer et al.
patent: 4694396 (1987-09-01), Weisshaar et al.
patent: 4807111 (1989-02-01), Cohen et al.
patent: 4937737 (1990-06-01), Schwane et al.
patent: 5073852 (1991-12-01), Siegel et al.
patent: 5218713 (1993-06-01), Hammer et al.
patent: 5222217 (1993-06-01), Blount et al.
patent: 5224215 (1993-06-01), Disbrow
patent: 5230051 (1993-07-01), Quan
patent: 5313638 (1994-05-01), Ogle et al.
patent: 5319778 (1994-06-01), Catino
Gregory T. Byrd and Bruce A. Delagi, "Support for Fine-Grained Message Passing in Shared Memory Multiprocessors" Mar. 1989, Knowledge Systems Laboratory, Report No. KSL-89-15, pp. 1-20.
F. J. Burkowski, G. V. Cormack, G. D. P. Dueck, "Architectural Support for Synchronous Task Communication" SIGARCH Computer Architecture News, vol. 17, No. 2, Apr. 1989, pp. 40-53.
Brian N. Bershad, Thomase E. Anderson, "User-Level Interprocess Communication for Shared Memory Multiprocessors" ACM Transactions on Computer Systems, vol. 9, No. 2, May 1991, pp. 175-198.
Joseph Pasquale, Eric Anderson, P. Keith Muller, "Container Shipping Operating System Support for I/O Intensive Applications" IEEE Computer Mar. 1994, pp. 84-93.
Gary J. Nutt, "Centralized and Distributed Operating Systems" Prentice-Hall, Inc., 1992, pp. 31-37, 109-117.

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