Depth-2 threshold logic circuits for logic and arithmetic functi

Details Depth-2 threshold logic circuits for logic and arithmetic functi Depth-2 threshold logic circuits for logic and arithmetic functi

1991-06-25

1994-10-18

Canney, Vincent P.

Excavating

371 36, G06F 1100

Patent

active

053575288

ABSTRACT:
The logical comparison and arithmetic addition functions are optimally constructed in depth-2 threshold logic circuits employing majority elements arranged into structures corresponding to sparse delta polynomials. A delta polynomial is a polynomial having a relatively large value for a particular set of variable values and having a relatively small value for all other sets of variable values. A delta polynomial can be constructed through a column-by-column consideration of an error-correcting code generator matrix. The sparseness of a delta polynomial constructed in this manner means that the delta polynomial expression for implementing a threshold logic circuig which combines n-bit numbers contains no more than n.sup.c terms. A further benefit of such a delta polynomial is the low values of its coefficients.

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