Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-03-29
2005-03-29
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S702000, C438S703000, C438S763000, C438S778000
Reexamination Certificate
active
06872633
ABSTRACT:
A method of filling an STI feature with a dielectric material using a HDP CVD technique is described. By omitting an inert carrier gas like argon in the first CVD step, a small keyhole in a SiO2layer is formed near the top of the trench. A sputter etch step in the same CVD chamber then removes dielectric material above the keyhole. A second CVD step completely fills the STI trench which is free of voids and forms a layer above the adjacent nitride layer. The nitride layer serves as an etch stop during a CMP step to lower the level of dielectric material until it is coplanar with the nitride layer. The method is low cost since all deposition and sputter etch steps are performed in an existing CVD tool and the same tool is useful in forming trenches of various sizes ranging from below 0.13 micron to above 0.25 micron.
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Huang Liu
Sudijono John
Chartered Semiconductor Manufacturing Ltd.
Fourson George
Garcia Joannie Adelle
Pike Rosemary L. S.
Saile George O.
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