Stock material or miscellaneous articles – Structurally defined web or sheet – Including sheet or component perpendicular to plane of web...
Reexamination Certificate
2000-05-30
2002-06-04
Jones, Deborah (Department: 1771)
Stock material or miscellaneous articles
Structurally defined web or sheet
Including sheet or component perpendicular to plane of web...
C428S469000
Reexamination Certificate
active
06399177
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Filed of the Invention
The present invention relates to the production of a high porosity semiconductor thin film via a plasma-enhanced chemical-vapor deposition system. More specifically, the present invention relates to a unique high density plasma approach which uses simultaneous plasma deposition and etching to obtain high porosity semiconductor thin film.
2. Description of Related Art
There is a great deal of interest in porous silicon structures. The reasons for this are two-fold. First, these porous films can be used in a variety of applications including MEMS (microelectro-mechanical devices), interconnect dielectic, micro-sensor, cell and molecule immobilization, and micro-fluidic applications. Secondly, the material is very compatible with Si microelectronics. There are various approaches to producing porous silicon materials. The technique attracting the most attention today for the fabrication of porous silicon is based on the use of wet chemical solutions and the electrochemical technique of anodization (R. C. Anderson, R. C. Muller, and C. W. Tobias, Journal of Microelectromechanical System, vol. 3, (1994), 10). Heretofore, this technique has yielded the best level of porosity among known approaches. The starting material for this wet etched material is either conventional silicon wafers or thin film Si produced by some deposition process such as low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD). In the electrochemical wet etching process the sample is exposed to a wet solution and a current is passed through a contact to the etching sample, through the etching sample, through the solution (e.g., a mixture of hydrofluoric acid, water and ethanol), and through an electrode contacting the solution (the cathode; e.g., platinum). This current causes the “pitting” or etching of the Si producing a porous network structure.
In the electrochemical (anodic) etching process the structure (e.g., pore size and spacing) and the porous-Si layer thickness are controllable by the resistivity of the silicon itself (magnitude and type), current density, applied potential, electrolyte composition, application of light, temperature, and exposure time. For sufficiently long exposures and for sufficiently thick starting material, this electrochemical etching process can be continued to the point where nanoscale structure (i.e., features of the order of nanometers) is obtained. The silicon features are a continuous single crystal when the sample is etched from a single crystal wafer or large grain polycrystalline silicon when the sample is etched from a deposited film. All these conventional (electrochemically etched) porous silicon materials are distinguished by (1) being the result of a wet, electrochemical etching process, (2) requiring a contact on the sample during this wet etching, (3) having generally disconnected pore regions which can be connected after extensive etching, and (4) being the result of a sequential processing first necessitating formation of the silicon and then necessitating subsequent wet etching.
Intense research activity in porous semiconductors has been even further stimulated over the last decade by the discovery of room temperature visible light emission from electrochemically prepared porous Si in 1990 by Canham (L. T. Canham, Appl. Phys. Lett. 57, 1046 (1990)), Soon after Canham's discovery, further intriguing properties of porous semiconductor materials were also realized, such as gas sensitivity, bio-compatibility and ease of micromachining, etc. (I. Schecter et al., Anal. Chem. 67, 3727 (1995); J. Wei et al. Nature 399, 243 (1999); L. T. Canham et al., Thin Sold Films, 297, 304 (1997); P. Steiner et al., Thin Solid Films 255, 52 (1995)). All demonstrated applications to-date have been based on porous silicon material produced by electrochemically etching a wafer or deposited film of silicon.
The approach to porous silicon in the present invention is to use deposition to grow as-deposited porous films; specifically the porous silicon is a deposited columnar material whose pores are the voids between the columns and clusters of columns. In the present invention, pores (void) regions are reasonably uniform through the thickness of the film and across the film. The present process is unique because it is performed at low temperature, the present inventors have demonstrated that the present invention can be used to control void size and void fraction, the void-column network morphology does not vary over thicknesses of interest, the columns can be polycrystalline material, and a plasma approach can be used to control the interaction between deposition and etching during growth. The present process yields high porosity (of up to approximately 90%), controlled pore size material without any back contacts and anodization-based wet processing. Unlike other deposition processes, the present process is based on high-density plasma deposition-etching interaction and is, therefore, able to give a high degree of controllable porosity (up to 90%), a morphology that does not vary with thickness, and doped or un-doped polycrystalline columns. Also unique to the present invention is its ability to fabricate this porous silicon on various types of substrates including glass, metal foils, insulators, plastic, and semiconductor-containing materials.
The high density plasma (HDP) deposition tool used in this demonstration was an electron cyclotron resonance plasma machine. In particular, our porous silicon was demonstrated by use of a high density plasma tool (e.g., Electron Cyclotron Resonance Plasma Enhanced Chemical Vapor Deposition (ECR-PECVD) tool (PlasmaTherm SLR-770)) using hydrogen diluted silane (H
2
:SiH
4
) as the precursor gas at substrate deposition temperatures less than or equal to about 250° C. This tool plays off silicon etching and deposition to create a two-dimensional silicon array and analysis has demonstrated that silicon column size is controllable, the spacing between columns is controllable, and morphology does not vary with thickness. Unlike other deposited columnar silicon materials, the column spacing can be maintained as the film grows in thickness and column phase composition can be controllably varied from polycrystalline to amorphous. The resulting void-column network structure is nanoscale in feature size and fully developed after a film thickness in the range of 10-20 nm is established. This enables the direct deposition of high porosity crystalline or amorphous silicon on any substrate and at any thickness greater than about 10 nm, and preferably between 10-20 nm. The porous semiconductor films produced by the present invention may be converted to insulators or metallic compounds through in situ or ex situ processing.
The prior art contains two approaches to porous silicon: (1) wet electrochemical etching of deposited silicon or of silicon wafers to produce a porous silicon with a “coral-like” morphology of polycrystalline or single-crystal silicon “fingers” or (2) deposition of silicon to produce a porous material consisting of tapered amorphous silicon rods with a morphology that varies with thickness. The former material has the advantage of a very controllable morphology and porosity and is the subject of a great deal of research and development activity. However, it requires wet chemical etching for its formation. The latter material suffers from only being available in the amorphous phase and of having a morphology that varies with thickness and a porosity that requires subsequent wet etching for control. The porous silicon of this invention requires no wet processing. It has a fully controllable morphology and porosity and can be in the polycrystalline or amorphous phase as desired.
This invention describes porous material deposition at low temperatures. These materials are particularly suitable for deposition on glass or plastic or other substrates requiring low processing temperatures such as substrates containing previously formed sensor, elec
Bae Sanghoon
Fonash Stephen J.
Kalkan Ali Kaan
Blackwell-Rudasill Gwendolyn
Jones Deborah
Ohlandt Greeley Ruggiero & Perle L.L.P.
The Penn State Research Foundation
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