Density improvement for planar hybrid wafer scale integration

Details Density improvement for planar hybrid wafer scale integration Density improvement for planar hybrid wafer scale integration

1993-04-30

1995-07-11

Picard, Leo P.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361761, 361784, 361792, 174 521, 174255, 257686, 257700, 437208, H01R 2368

Patent

active

054326818

ABSTRACT:
Chip-like stacks of thinned chips are mounted in wells etched into a substrate. A "chip-like" stack is a stack of chips, which in the aggregate have a height approximately equal to that of a single conventional chip. These chip-like stacks are mounted in a variety of packages. In a preferred embodiment, the stacks are mounted in wells within the substrate of an integrated circuit and the stack is provided with a patterned overlay so that all the circuit connections can be made from the upper surface of the stack. The patterned overlay is protected by a planar insulator. A plurality of substrates may be stacked, one upon the other.

REFERENCES:
patent: 4525921 (1985-07-01), Carson et al.
patent: 4617160 (1986-10-01), Belanger et al.
patent: 4706166 (1987-11-01), Go
patent: 4877752 (1989-10-01), Robinson
patent: 4953005 (1990-08-01), Carlson et al.
patent: 4984358 (1991-01-01), Nelson

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