Dense dynamic memory cell structure and process

Details Dense dynamic memory cell structure and process Dense dynamic memory cell structure and process

1981-07-22

1985-04-16

Edlow, Martin H.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 2312, 357 231, 357 2311, 357 41, 357 49, 357 52, 365186, H01L 2978, H01L 2702, H01L 2934, H01L 2710

Patent

active

045119112

ABSTRACT:
A dynamic memory is provided having a cell with an improved structure and made by an improved process which substantially reduces the capacitance of the bit/sense line connected to the cell. The cell has one field effect transistor and a storage node, and the cell structure includes a thick insulating segment located under a portion of a conductive layer or field shield and under a portion of the gate electrode of the transistor, while extending over the entire diffusion region of the bit/sense line and over substantially the entire depletion region surrounding the bit/sense line diffusion region.

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Bearse, S. V., "Alternatives Weighed for MOS Capacitors", Microwaves, vol. 15, No. 5, pp. 9, 13, May 1976.
Kroell et al, "Field Shield MOS Transistor with Self-Aligned Gate", IBM Tech. Discl. Bull., vol. 16, No. 6, Nov. 1973, pp. 1860-1861.

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