Demultiplexing device of synchronous multiplexing system

Multiplex communications – Wide area network – Packet switching

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3701001, 3701101, H04J 306, H04J 312

Patent

active

049775588

ABSTRACT:
A circuit which operates at the fixed timing and discriminates the control signal is provided and the timing pulse for demultiplexing is controlled in accordance with the discriminated control signal in the receiving part of the synchronized multiplexing system in which the basic signals are generated by inserting the control signal required for multiplexing on the frame structure of basic signal rate and the high level multiplexing signal is formed by multiplexing such basic signals, thereby stable correspondence between the channel at the time of multiplexing in the sending side and the channel after the demultiplexing in the receiving side can be ensured.

REFERENCES:
patent: 4382297 (1983-05-01), Farrow
patent: 4719624 (1988-01-01), Bellisio
patent: 4744082 (1988-05-01), Fujimura et al.
patent: 4764921 (1988-08-01), Graves et al.
patent: 4771426 (1988-09-01), Rattingourd et al.

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