Demultiplexer using current sample/hold circuit, and display...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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C345S098000

Reexamination Certificate

active

07342559

ABSTRACT:
A demultiplexer using sample/hold circuits, and a display device using the same. The demultiplexer includes a first sample/hold circuit group with first and second sample/hold circuits for sampling the data current according to a first sampling order during a first interval, and programming the current corresponding to the sampled and stored data to at least two signal lines during a second interval. The demultiplexer further includes a second sample/hold circuit group with third and fourth sample/hold circuits for sampling the data current according to a second sampling order during a second interval, and programming the current corresponding to the sampled and stored data to the signal lines during a third interval. The first and second sampling orders in even the even frames are different from the sampling orders in the odd frames.

REFERENCES:
patent: 6333729 (2001-12-01), Ha
patent: 6847346 (2005-01-01), Kumagai et al.
patent: 7030844 (2006-04-01), Kang et al.
patent: 7057589 (2006-06-01), Shin et al.
patent: 7205972 (2007-04-01), Kyeong et al.

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