Demultiplexer circuit

Details Demultiplexer circuit Demultiplexer circuit

2006-12-19

2006-12-19

Duong, Frank (Department: 2616)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

Reexamination Certificate

active

07151784

ABSTRACT:
A demultiplexer circuit which can simultaneously demultiplex plural pieces of input data while minimizing the circuit scale. The demultiplexer circuit includes an input line identification information addition circuit2for giving input line identification information to input data which have data identification information and are inputted through plural input lines1, respectively; a multiplexer4for outputting the input data which have been given the input line identification information, respectively, by the input line identification information addition circuit2through one common line5; a filter6for filtering the data outputted from the multiplexer4on the basis of the input line identification information and the data identification information at one time; and a filter table7that contains filtering conditions which are used in the filter6.

REFERENCES:
patent: 5619197 (1997-04-01), Nakamura
patent: 5708961 (1998-01-01), Hylton et al.
patent: 5835591 (1998-11-01), Cochon et al.
patent: 6621870 (2003-09-01), Gordon et al.
patent: 6970482 (2005-11-01), Kim
patent: 6996101 (2006-02-01), Coupe et al.
patent: 2000-083064 (2000-03-01), None
patent: 2000-156705 (2000-06-01), None

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