Demodulators – Phase shift keying or quadrature amplitude demodulator
Patent
1992-08-12
1993-12-21
Grimm, Siegfried H.
Demodulators
Phase shift keying or quadrature amplitude demodulator
329306, 375 80, 375 83, H04L 2722
Patent
active
052724476
ABSTRACT:
A digital phase demodulator and digital phase demodulation method in delay detection form uses digital circuitry without a subtracter and with low power consumption. A phase measurement timing signal generator (11) outputs the phase measurement timing signal (103) produced by sampling a reception symbol cycle signal (101) by a reception signal (102) modulated to the logical level. A phase counter (31) outputs a synchronous clock signal (105) coinciding with a frequency of a reference clock (108) multiplied by n times the carrier frequency of the reception signal (102) so that the phase is synchronized with the phase measurement timing signal (103). The phase counter (14) counts the phase clock (105), and is reset by the phase measurement timing signal (103). The decoder (15) decodes a counted value (104) of the phase counter as a phase rotation quantity to the modulation data (107).
REFERENCES:
patent: 4746872 (1988-05-01), Yamagata
Hideho Tomita et al., Digital Intermediate Frequency Demodulation Technique for Cellular Communication Systems, IEEE Global Telecommunications Conference, Dec. 1990, pp. 1827-1831.
Furuya Yukitsuna
Tsumura Soichi
Grimm Siegfried H.
NEC Corporation
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