Demodulation method and demodulator

Details Demodulation method and demodulator Demodulation method and demodulator

2005-07-05

2005-07-05

Mis, David (Department: 2817)

Demodulators

Frequency shift keying or minimum shift keying demodulator

C375S324000, C375S334000

Reexamination Certificate

active

06914478

ABSTRACT:
A demodulator includes a count section, a synchronization timing setting section, and a code judgment section. The count section has four counters that count a number of waves of an FSK-modulated digital signal at different timing within a bit time width. The synchronization timing setting section designates a synchronized timing signal based on the count value of the count section. Then, the code judgment section compares the count value with a threshold value to judge the signal level, thereby decoding the digital signal.

REFERENCES:
patent: 5483193 (1996-01-01), Kennedy et al.
patent: 6160857 (2000-12-01), Yang
patent: A-S54-087465 (1979-07-01), None
patent: A-H05-48663 (1993-02-01), None
patent: A-H08-237320 (1996-09-01), None
patent: 8-331186 (1996-12-01), None
patent: A-10-173715 (1998-06-01), None
patent: 10-257109 (1998-09-01), None

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