Demand paging scheme for a multi-ATB shared memory processing sy

Details Demand paging scheme for a multi-ATB shared memory processing sy Demand paging scheme for a multi-ATB shared memory processing sy

1983-07-11

1986-03-18

Thomas, James D.

Boots, shoes, and leggings

G06F 1212, G06F 1210, G06F 1206, G06F 1300

Patent

active

045772746

ABSTRACT:
Disclosed is a demand paging scheme for a shared memory processing system that uses paged virtual memory addressing and includes a plurality of address translation buffers (ATBs). Page frames of main memory that hold pages being considered for swapping from memory are sequestered and flags, one corresponding to each ATB in the system, are cleared. Each time an ATB is flushed, its associated flag is set. Setting of all the flags indicates that the address translation information of pages held by selected sequestered page frames does not appear in any ATB and that the selected pages may be swapped from main memory.

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