Delta-sigma modulator with improved full-scale accuracy

Details Delta-sigma modulator with improved full-scale accuracy Delta-sigma modulator with improved full-scale accuracy

1998-08-17

2000-10-31

Young, Brian

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

341125, 341155, 341139, H03M 300

Patent

active

061409502

ABSTRACT:
The invention provides methods and apparatus for improving the full-scale accuracy of an oversampling analog-to-digital converter. In particular, an improved switched-capacitor subtractor/integrator circuit is described that effectively provides a desired capacitor ratio by using N+M distinct unit capacitors that each sample an input signal a first predetermined number of times and sample one or more reference signals a second predetermined number of times, where the ratio of the first predetermined number to the second predetermined number is the desired capacitor ratio N/M.

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Steven R. Norsworthy et al., "Decimation and Interpolation for .DELTA..SIGMA. Conversion," Delta-Sigma Data Converters, Steven R. Norsworthy et al. eds., Ch. 13, pp. 406-444, IEEE Press 1997.
James C. Candy et al., "Oversampling Methods of A/D and D/A Conversion," Oversampling Delta-Sigma Converters, Steven R. Norsworthy et al. eds., pp. 1-25, IEEE Press 1992.
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James C. Candy et al., "Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator," IEEE Trans. Commun., vol. COM-24, pp. 1268-1275, Nov. 1976.
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