Delta-sigma modulator having quantizer code pattern...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C341S131000

Reexamination Certificate

active

07317411

ABSTRACT:
A delta-sigma having quantizer code pattern detection controlled dither reduces the probability of “stuck” code sequences that occur when the input signal and feedback signal are equal and thus no quantizer output change occurs. In particular, in modulators that are periodically reset, the pattern detection and dither control reduce the probability of a stuck code sequence at startup. A pattern detection circuit detects a sequence of unchanging quantizer output values and injects a signal at the quantizer input to cause the quantizer to change levels. The injected signal may be a dither signal that is increased in amplitude in response to the detection of unchanging code sequences and then decreased when the quantizer output changes.

REFERENCES:
patent: 6738004 (2004-05-01), Melanson
patent: 6888484 (2005-05-01), Kiss et al.
patent: 7064698 (2006-06-01), Locher et al.
patent: 7129874 (2006-10-01), Bjornsen
U.S. Appl. No. 11/297,016, filed Dec. 8, 2005, Melanson, et al.
U.S. Appl. No. 11/297,011, filed Dec. 8, 2005, Melanson.
Robert, et al., “A Second-Order High-Resolution Incremental A/D Converter with Offset and Charge Injection Compensation”, IEEE JSSC, vol. 23, No. 3, Jun. 1988.
Quinquempoix, et al., “A Low-Power 22-bit Incremental ADC with 4ppm INL, 2ppm Gain Error and 2uV DC Offset”, Proceedings of ESSIRC, Grenoble, FR 2005.

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