Delta sigma modulator

Details Delta sigma modulator Delta sigma modulator

1992-07-14

1993-05-25

Logan, Sharon D.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

341158, H03M 300, H03M 134

Patent

active

052144313

ABSTRACT:
A data latch circuit of a delta sigma modulator is controlled in timing of data output by clock signal. For this purpose, the data latch circuit has a reverse phase clock input terminal connected to a first delay circuit and a forward phase clock input terminal connected to a second delay circuit. The latch circuit is composed of two P-MOS transistors and two N-MOS transistors. The delay times of the first and second delay circuits are coincided, and those of the respective two P- and N-MOS transistors are also coincided.

REFERENCES:
patent: 4156871 (1979-05-01), Lambourn
patent: 4374331 (1983-02-01), Yamamoto et al.
patent: 4691122 (1987-09-01), Schnizlein et al.
patent: 4768018 (1988-08-01), Noujaim
patent: 4777472 (1988-10-01), Sauer et al.
patent: 4926178 (1990-05-01), Mallinson
patent: 4970407 (1990-11-01), Patchen
patent: 4999625 (1991-03-01), Thompson
patent: 5021786 (1991-06-01), Gerdes

Affiliated with

Also associated with

Rating

Delta sigma modulator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Delta sigma modulator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delta sigma modulator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-900533