Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synthesizer
Patent
1996-11-08
1998-07-14
Nelms, David C.
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synthesizer
327107, 327150, 327159, H03B 2100
Patent
active
057810443
DESCRIPTION:
BRIEF SUMMARY
This application is a 371 of PCT/CA95/00271.
TECHNICAL FIELD
The invention relates to frequency synthesizers and especially fractional-N frequency synthesizers. The invention also relates to frequency discriminators especially suitable for use in such frequency synthesizers.
BACKGROUND ART
Known fractional-N frequency synthesizers, such as that disclosed in U.S. Pat. No. 4,965,531, use an analog phase detector to detect the error signal or difference between the frequency being generated and a desired frequency. Such frequency synthesizers are not entirely satisfactory because analog phase detectors are not perfectly linear, can be a source of noise, and can themselves be sensitive to noise/interference.
U.S. Pat. No. 4,810,974 discloses a voltage controlled oscillator intended for periodically compensating the effects of temperature and aging. It comprises a single loop with an analog phase/frequency comparator and uses an integer divider to generate output frequencies which are integer multiples of a reference frequency.
DISCLOSURE OF THE INVENTION
According to one aspect of the invention, there is provided a fractional-N synthesizer comprising a voltage controlled oscillator responsive to a control voltage (V.sub.c) to generate an output signal (F.sub.o) having a particular frequency, frequency discriminator means responsive to the output signal (F.sub.o) and a reference signal (F.sub.ref) having a predetermined reference frequency to generate a digital signal (D.sub.o) representing the output signal frequency, differencing means responsive to the digital representation signal and to a digital input signal representing a desired output frequency (F.sub.d) to provide an error signal (e), and digital-to-analog conversion means for converting the error signal to provide said control voltage (V.sub.c), the frequency discriminator means comprising a phase-locked loop means phase-locked to the output signal (F.sub.o).
With such a configuration, the combined transfer function of the frequency synthesizer can be such that quantization noise generated by the frequency discriminator is substantially eliminated from the output signal (F.sub.o).
Preferably, filter means is provided between the digital-to-analog conversion means and the voltage controlled oscillator. This filter means may comprise an analog integrator and remove some quantization noise.
Filter means may be provided between the differencing means and the digital-to-analog conversion means. This filter means may comprise a digital integrator such that the output signal frequency (F.sub.o) is phased locked to the reference signal frequency (F.sub.ref).
Where both the first-mentioned filter means and the second-mentioned filter means are included, a stabilizing zero means will generally be included to ensure stability of the frequency synthesizer circuit. The stabilizing zero means may comprise a feed forward loop and summing means provided in one of the filter means, conveniently that provided between the differencing means and the digital-to-analog conversion means.
The frequency discrimination means may comprise a frequency discriminator connected to receive the output signal from the voltage-controlled oscillator and decimation filter provided between the output of the frequency discriminator and the differencing means. The decimation filter will reduce the sampling rate of the frequency discriminator, for example from 10 MHz to 1 MHz, contributing, in the process, to reduction of quantization noise.
The frequency discrimination means may comprise a frequency discriminator comprising a feedforward path including a multimodulus divider means for dividing the frequency of the output signal (F.sub.o) in dependence upon a division ratio control signal, comparison means for comparing the divided signal with the reference signal to provide a second error signal, and a feedback path comprising a circuit having a transfer function of 2-Z.sup.-1 and responsive to the error signal and the reference signal to provide the division ratio control signal.
REFERENCES:
patent: 4580107 (1986-04-01), Caldwell et al.
patent: 4810974 (1989-03-01), Hulbert et al.
patent: 5173665 (1992-12-01), Norimatsu
patent: 5258724 (1993-11-01), Tanis et al.
patent: 5329253 (1994-07-01), Ichihara
patent: 5552750 (1996-09-01), Barrett, Jr. et al.
patent: 5563535 (1996-10-01), Corry et al.
patent: 5630222 (1997-05-01), Barrett, Jr. et al.
An Oversampling Delta-Sigma Frequency Discriminator, by R. Douglas Beards and Miles A. Copeland IEEE Transactions on Circuits and Systems--II: Analog and Digital Signal Processing, vol. 41, No. 1, Jan. 1994.
Copeland Miles A.
Riley Thomas A. D.
Adams Thomas
Nelms David C.
Nguyen Hein
Northern Telecom Limited
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