Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2000-11-28
2002-04-09
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S144000
Reexamination Certificate
active
06369731
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to delta sigma D/A converters for audio applications having high S/N (Signal-to-Noise) ratio and, more particularly, to a circuit configuration of a delta sigma D/A converter of the order of 2nd-order or higher having means for reducing idling noise during no-signal input.
Conventionally, a delta sigma modulation scheme has being used as a D/A converter for audio application which is to be comparatively easily realized with high performance, such as of full harmonic distortion ratio (ratio of higher harmonic components and signals) and S/N ratio. In this delta sigma modulation scheme, there is a merit that the PCM digital signal, for example, of 16 bits or higher is converted into a low quantization signal of from 2 level (1 bit) to several-numbered level (several bits) by a noise shaping technology and reproduced into an analog signal by a several-numbered level local D/A converter. Consequently, it can be said that this scheme is a scheme adapted for a process advanced in miniaturization down to sub-micron or less, wherein absolute or relative variation increases in the analog element values such as of resistors and capacitors.
In the delta sigma modulation scheme, because quantization noise distributes with deviation to a higher frequency region (called noise shaping), a high S/N ratio is available by removal through a low pass filter. It is known that S/N ratio is theoretically dependent upon the order, sampling frequency and quantization level of a delta sigma modulator (called also a noise shaper) (see “A-D/D-A Conversion Technology of an Over-sampling Scheme, 2nd round”, Nikkei Electronics 1988.8.8 No. 453 pp. 211-221).
Although, theoretically, higher S/N ratio is to be obtained with higher order of the noise shaper, conversely the operation of a feedback system becomes instable. Due to this, it is usual that the D/A converter usually has a 3rd-order to 4th-order noise shaper.
In this delta sigma modulation scheme, the noise shaper possesses a loop filter wherein this loop filter is in operation without stoppage when the input signal becomes an absence of a signal. Due to this, even if the input signal is a zero fixed value, a constant data pattern appears in output values of the noise shaper. It is known that this results in occurrence of undesired phenomenon outputting a particular spectrum in the audio (audible) band.
Conventionally, as a countermeasure to this there have been a method of applying intentionally-caused noise called dither to the noise shaper signal. This dither is a technology not limited to the D/A converter but utilized also in the A/D converter. There seems to be no especial problem if the dither is out of the audible frequency band. However, despite actually out of the audible band, large noise if caused is disadvantageous for the S/N ratio of an analog circuit in a rear stage of the noise shaper.
Due to this, there is as another countermeasure a method of stopping the noise shaper when the input signal detects zero for a constant period of time.
The conventional stopping methods includes, for example, one disclosed in Japanese Patent Publication No. 118647/1995. This provides a switch on an output side of the noise shaper so that the output is forcibly rendered zero by switching this switch. However, there has been a problem that this switching of the switch conversely causes noise posing a problem in an audio sense at that instance.
FIG. 7
shows a conventional example of a 3rd-order delta sigma D/A converter (noise shaper) disclosed in Japanese Patent Publication No. 118647/1995. Usually, the operation of a noise shaper is expressed as a system function using a “z-converted” function often used in the discrete signal processing. It is assumed that th e input signal to a noise shaper is X(z), the input signal to a quantizer Q is U(z), the output signal is Y(z) and the quantization noise caused by the quantizer is N(z). The error signal E(z) occurring across the quantizer Q is a change of symbol of the quantization noise caused within the quantizer Q and expressed by the following formula:
E(z)={U(z)−Y(z)}=−N(z) (1)
Next, because the system function of the 1-sample delayer is expressed as (Z
−1
), a system function of an FIR-filter-type loop filter having an input of E(z) and configured by three 1-sample delayer D
1
, D
2
, D
3
, a multiplier and an adder can be expressed by:
F(z)=(3z
−1
−3z
−2
+z
−3
). (2)
The output V(z) of the FIR-filter-type loop filter is to be expressed by the following:
V(z)=F(z)·E(z) (3)
Furthermore, from these V(z) and input X(z), the relation to the input of U(z) the quantizer Q is to be expressed as:
U(z)=X(z)+V(z). (4)
From the above relationship, the output signal Y(z) of the noise shaper is expressed as:
Y
(
z
)
=
U
(
z
)
+
N
(
z
)
=
X
(
z
)
+
(
1
-
3
z
-
1
+
3
z
-
2
-
z
-
3
)
N
(
z
)
=
X
(
z
)
+
(
1
-
z
-
1
)
3
N
(
z
)
.
(
5
)
From this, the noise component contained in the output Y(z) has a noise distribution expelled from a lower frequency side to higher frequency side, as expressed by the following system function:
H
(
z
)
=
(
1
-
z
-
1
)
3
=
(
1
-
3
z
-
1
+
3
z
-
2
-
z
-
3
)
(
6
)
This is a reason of being called noise shaping. The S/N ratio can be improved by removing noise component with a low pass filter as stated above.
In a conventional example shown in
FIG. 7
, a switch is provided on an output side of a quantizer Q of a 3rd-order delta sigma D/A converter. By this switch, the output Y(z) is switched directly to zero value. That is, when detecting the input signal X(z) is zero by a not-shown detector, a mute request signal MTR is turned on. Then, if a quantization error E(z) in absolute value is smaller than a constant value REF, the switch S is switched such that the output is put in zero value after a delay of a constant period of time. Due to this, the operation of the noise shaper is stopped.
However, in the conventional-example 3rd-order noise shaper structure, there is a possibility of causing great sound in an audio fashion at the instance of rendering to zero value. The way of applying mute in this manner is not preferred because of possibility of causing noise in an audio fashion.
In this manner, the conventional plural-number-order delta sigma D/A converter for audio applications has the switch provided on the output side in order to prevent idling noise caused at no-signal input by the noise shaper and stop the operation of the noise shaper. In such a case, however, there is a possibility of causing click noise. In order not to input this to a rear-staged amplifier, a separate circuit measure has been required for removal. That is, there is a problem that signal passes be increased and the control circuit be extensionally provided for them.
Therefore, it is an object of the present invention to prevent occurrence of noise not preferred in an audio sense upon switching the switch for muting in a delta sigma D/A converter.
Another object of the invention is to provide a novel circuit configuration and its stop sequence for a delta sigma D/A converter of a plural-number order capable of performing mute operation without causing click noise upon no-signal input.
SUMMARY OF THE INVENTION
In order to achieve the objects, the present invention has the following configuration to apply mute for rendering zero an output of a delta sigma D/A converter of a plural number of order.
That is, in an nth-order (n is an integer of 2 or greater) delta sigma D/A converter, there comprises: a main adder to be inputted by an input signal; a quantizer having as an input an output of the main adder; a 1-sample delayer having as an input a quantization error by the quantizer; 1st-order differentiators of (n−1) in number connected continuous to an output side of the 1-sample de
Hanada Yoshihiro
Takeda Minoru
Toyama Akira
Jordan and Hamburg LLP
Nippon Precision Circuits Inc.
Wamsley Patrick
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