Delta-sigma D/A converter

Details Delta-sigma D/A converter Delta-sigma D/A converter

2000-02-04

2001-09-18

Williams, Howard L. (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S143000

Reexamination Certificate

active

06292124

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a delta-sigma digital-to-analog (D/A) converter capable of performing D/A conversion with high accuracy and a high signal-to-noise ratio (S/N) and, more particularly, to a delta-sigma digital-to-analog converter designed to convert the output of a quantizer having a plurality of quantization levels into analog form.
2. Description of the Related Art
Some digital audio devices, such as compact disk (CD) players, use delta-sigma modulation D/A converters. Such a converter oversamples a multibit digital signal read from a CD, converts it into a multilevel digital signal, and converts this digital signal to analog form. For example, as shown in
FIG. 7
, the converter includes a noise shaper X
1
that receives a multibit digital signal, implements noise shaping, and cancels out low-frequency components of quantization noise produced by a quantizer, as described later herein. A quantizer X
2
is included in the noise shaper X
1
and acts to compare the input with plural levels and to implement multi-level quantization. The converter further includes a local D/A converter X
3
for converting the digital output from the quantizer into analog form. For example, a third-order noise shaper, shown in
FIG. 8
, is one example of a noise shaper and consists of multipliers Y
1
and Y
2
; delay circuits Y
3
, Y
4
, and Y
5
; and adders Y
6
and Y
7
. Each of the delay circuits Y
3
, Y
4
, and Y
5
introduces a delay of one sampling interval. These delay circuits are connected in cascade. The inputted multibit digital signal is summed by the adder Y
6
with the output from the delay circuit Y
5
and with the outputs from the delay circuits Y
3
and Y
4
which are multiplied by coefficients “3” and “−3”, respectively, via the multipliers Y
1
and Y
2
, respectively. The output from the adder Y
6
is fed to the quantizer X
2
. The output from the quantizer X
2
is subtracted from the input by the adder Y
7
and applied to the delay circuit Y
3
. In
FIG. 8
, a 22-bit digital signal at the input is converted to a 11-level digital signal.
To obtain high accuracy and a high S/N ratio from a conventional delta-sigma D/A converter, it is theoretically necessary that the order of the noise shaper, the sampling frequency, and the number of quantization levels of the quantizer be increased. Increasing the order of the noise shaper will increase the number of sets of integrators forming the noise shaper, multipliers, and delay circuits. This will increase the size of the circuitry. If the order of the noise shaper is increased greatly, noise at high frequencies will be increased. If the sampling frequency is increased, the system clock frequency of the digital audio system will be increased. As a result, the device is more vulnerable to clock jitter. Furthermore, the cost is increased. Additionally, the power consumption is increased. In addition, there is a danger of generation of interference with the analog audio circuit portion of the audio system. Hence, the conventional delta-sigma D/A scheme has limitations. Therefore, it is essential to increase the number of quantization levels of the quantizer.
The local D/A converter of the delta-sigma modulation system has a resolution of only tens of levels according to the number of output levels of the quantizer. However, the value of each level is required to have a very high relative accuracy. For example, where an accuracy exceeding 16 bits is required, if resistors, capacitors, and so on are simply arrayed as D/A converter elements, the strict requirement on the relative accuracy cannot be satisfied because of variations among the converter elements due to the semiconductor fabrication process used for fabrication of the integrated circuits (ICs) for D/A converters. Consequently, a local D/A converter of the PWM (pulse-width modulation) or DEM (dynamic element matching) type is used, in addition to an increased number of quantization levels of the quantizer.
In the PWM system, plural levels are represented by varying the pulse width of one sampling interval. The conversion accuracy is mainly determined by the clock accuracy taken along the time axis. Therefore, the conversion accuracy is hardly affected by the fabrication errors introduced in manufacturing ICs and so on. Hence, the PWM system has the advantage that high accuracy can be accomplished easily. On the other hand, a high system clock frequency that is more than double the sampling frequency is necessary. Furthermore, PWM has the disadvantage that the conversion accuracy is greatly affected by clock jitter.
The DEM system is a D/A converter that has conversion elements which consist of resistors and capacitors that have the same conversion capability, according to the output level of a quantizer. In particular, the D/A converter shown in
FIG. 7
comprises a DEM converter
30
, 2N resistors r
1
-r
12
, an inverter portion
31
, and an operational amplifier
32
. The DEM converter
30
has N outputs corresponding to the number of output levels N of the quantizer X
2
. The resistors r
1
-r
12
are converter elements and have the same resistance value. The DEM converter
30
supplies a unit amount of current to selected ones of resistors r
1
-rN and r′
1
-r′N. The number of the energized resistors corresponds to the output level of the quantizer X
2
. The amounts of current supplied to the resistors are summed up in an analog manner and supplied to the operational amplifier
32
to produce an analog output corresponding to the output level of the quantizer X
2
. The DEM method does not need a conversion clock frequency higher than the sampling frequency, unlike the PWM method. Since this system has analog conversion elements, such as resistors and capacitors, the conversion accuracy is deteriorated by the inconsistencies among the elements. In the DEM system, the elements are used in turn. On average, all elements are used during the same time. This moves noise components due to inconsistencies among the conversion elements to higher frequencies. As a result, a high conversion accuracy is accomplished for low-frequency components that are used in practice.
However, the DEM system has the disadvantage that the IC chip area is increased because many conversion elements such as resistors and capacitors are used. This leads to an increase in the cost. Furthermore, inputs that are inverted in level with respect to each other are applied respectively to non-inverting and inverting input terminals of the operational amplifier
32
shown in FIG.
7
. That is, a differential input system is adopted. Consequently, the number of the necessary converter elements reaches twice the number N of the quantization levels.
SUMMARY OF THE INVENTION
Accordingly, in the embodiments of the present invention, each sampling interval of a quantizer is divided into a former half and a latter half. The output level of the quantizer is divided such that it is expressed by the sum of output levels of second and third digital signals, each of which is obtained by dividing the first-mentioned output level to a half of it or an integer close to a half of it. In the former half of the sampling interval, an inverted level signal obtained by inverting the third digital signal is subtracted from a level signal corresponding to the second digital signal. In the latter half of the sampling interval, an inverted level signal obtained by inverting the second digital signal is subtracted from a level signal corresponding to the third digital signal, thus producing an analog signal. The number of elements such as resistors and capacitors forming the conversion elements is halved compared with the prior art DEM system simply by using a clock frequency that is double the sampling frequency. In other words, for the same number of elements, a more accurate D/A converter is accomplished.
The embodiments of the present invention provide a delta-sigma D/A converter comprising a quantizer, a noise shaper, a divider, and a differen

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