Delta-sigma analog-to-digital converter including charge coupled

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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341172, H03M 302

Patent

active

057607230

ABSTRACT:
A delta sigma modulator having reduced quiescent power consumption as compared to known delta sigma modulators utilizes no operational amplifiers and includes, in one embodiment, an input CCD and a summing CCD coupled to the output of the input CCD. A readout is connected to receive output signals from the summing CCD. Both an integration/recirculation input CCD and a comparator are provided to receive output signals from the readout. The integration/recirculation input CCD feeds back a charge to the summing CCD, and the output of the comparator is connected to a fill and spill reference CCD, which also feeds back a charge to the summing CCD. The comparator output signal is an oversampled digitized version of the analog signal sampled by the input CCD. The comparator output signal is supplied to a low pass digital filter, and a decimator is connected to the output of the digital filter.

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patent: 5585797 (1996-12-01), Tsunai

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