Delta-sigma analog-to-digital converter, and method

Details Delta-sigma analog-to-digital converter, and method Delta-sigma analog-to-digital converter, and method

2000-05-19

2001-11-06

Jeanpierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000

Reexamination Certificate

active

06313774

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to data converters and, in particular, relates to an analog-to-digital converter (ADC) with delta-sigma modulation.
BACKGROUND OF THE INVENTION
By modern electronics, useful information (for example voice, measurement data, music, control commands, etc.) is transmitted, processed or otherwise manipulated by signals in analog (A) form or digital (D) form. Signal conversion between analog (A) and digital (D) signals in both directions is thereby often required. The quality of analog-to-digital converters (ADC) and digital-to-analog converters (DAC) and other electronic circuits can be expressed by, for example, a signal-to-noise ratio (SNR) indicating how useful signals are separated from unwanted signals.
Sigma-delta modulators serving as analog-to digital converters are well known in the art and had been described in a variety of publications. They are also known under the term “delta-sigma modulators”.
For the application of sigma-delta modulators and for prior art designs, the following references are useful: (REF 1) Temes, G. C: “Delta-Sigma Data Converters”, chapter 10 on pages 317-339 of the following: “Franca, J. E., Tsividis, Y. (editors): ‘Design of Analog-Digital VLSI Circuits for Telecommunications and Signal Processing’, Second Edition, Prentice Hall, Englewood Cliffs, 1994, ISBN 0-13-203639-8”; (REF 2) Carley, R. L., Schreier R., Temes, G. C.: “Delta-Signal ADCs with Multibit Internal Converters”, chapter 8 on pages 244-281 of the following: “Norsworthy, S. R., Schreier, R., Temes, G. C. (editors): ‘Delta-Sigma Data Converters’, IEEE Press, New York, 1997, ISBN 0-7803-1045-4”; and (REF 3) Proakis, J. G., Manolakis, D. G. : “Digital Signal Processing”, Third Edition, Prentice Hall, Englewood Cliffs, 1996, ISBN 0-13-373-762-4, chapter 9.2. “Analog-to-Digital Conversion”, on pages 748-762, and chapter 3.1. “Z-Transform”, on pages 151-160.
FIG. 1
illustrates a simplified block diagram of prior art delta-sigma converter
100
providing a multilevel digital output signal Y. Converter
100
comprises adder
105
, analog integrator
110
, multibit quantizer
120
(i.e. ADC), and multibit digital-to-analog converter
130
(DAC). Adder
105
receives input signal X from analog input
101
; quantizer
120
provides multilevel digital output signal Y (e.g., 2
M
different magnitude levels) to digital output
102
; DAC
130
feeds back Y via feedback lines
121
(e.g., M bit) and
131
(analog) to adder
105
. The feedback forces the average value of signal Y to track the average signal X. Any difference between X and Y accumulates in integrator
110
and eventually corrects itself. However, the linearity of DAC
130
limits the linearity of the complete converter
100
.
FIG. 2
illustrates a simplified time diagram of digital output signal Y of the converter of
FIG. 1
for an assumed ramping input signal X. Conveniently,
FIG. 2
also illustrates sampling time intervals T
S
. In the example, Y has a M=3 bit resolution with magnitude levels “000” for level 0, “001” for level 1, “010” for level 2, “011” for level 3, etc.
Signal X has a maximum frequency of F. Quantizer
120
operates at sampling frequency F
S
(signal from input
103
, F
S
=1/T
S
) that is, preferably, an oversampling frequency in respect to F. The quantization noise introduced by quantizer
120
has a first order shape. The signal noise ratio of the output signal is estimated as follows:
SNR=k*(F/F
S
)
−1.5
*(2
M
−1)  (1)
where k is a constant factor. The SNR can be improved by increasing M, i.e. having a higher bit resolution in quantizer
120
and DAC
130
. However, this is not desirable due to higher manufacturing costs.


REFERENCES:
patent: 4536880 (1985-08-01), Grallert
patent: 4772871 (1988-09-01), Suzuki et al.
patent: 5790063 (1998-08-01), Koifman et al.
patent: 5889482 (1999-03-01), Zarubinsky et al.
patent: 5903232 (1999-05-01), Zarubinsky et al.
patent: 6218973 (2001-04-01), Barrett, Jr. et al.
Temes, G.C: “Delta-Sigma Data Converters”, chapter 10 on pp. 317-339 of the following: “Franca, J.E., Tsividis, Y. (editors): ‘Design of Analog-Digital VLSI Circuits for Telecommunications and Signal Processing’, Second Edition, Prentice Hall, Englewood Cliffs, 1994, ISBN 0-13-203639-8”.
Carley, R.L., Schreier R., Temes, G.C.: “Delta-Signal ADCs with Multibit Internal Converters”, chapter 8 on pp. 244-281 of the following: “Norsworthy, S. R., Schrier, R., Temes, G. C. (editors): ‘Delta-Sigma Data Converters’, IEEE Press, New York, 1997, ISBN 0-7803-1045-4”.
Proakis, J. G., Manolakis, D. G.: “Digital Signal Processing”, Third Edition, Prentice Hall, Englewood Cliffs, 1996, ISBN 0-13-373-762-4, chapter 9.2. “Analog-to-Digital Conversion”, on pp. 748-762.
Proakis, J. G., Manolakis, D. G.: “Digital Signal Processing”, Third Edition, Prentice Hall, Englewood Cliffs, 1996, chapter 3.1. “Z-Transform”, on pp. 151-160.

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