Delta-sigma analog-to-digital converter

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Patent

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Details

341118, H03M 302

Patent

active

053231562

ABSTRACT:
An apparatus is provided to avoid linearity errors caused by switching at different frequencies. The apparatus includes an integrator whose signal input is supplied through an integrating resistor with an analog signal; a comparator having its comparator input connected to the integrator output and its reference input grounded; a pulse-width selector providing a narrow or wide pulse depending comparator output, whose signal is connected to the comparator output, and whose first clock and second inputs are supplied with a clock signal and an additional clock signal derived from said clock signal by frequency division (divisor n>3); series combined first and second electronic switches which are connected between a unipolar reference voltage and ground or between the two terminals for a bipolar, balanced-to-ground reference voltage, with the control inputs of the electronic switches connected to the noninverted and inverted outputs, respectively, of the pulse-width selector, and with the junction of the electronic switches connected to a further-processing arrangement and through a feedback resistor to the signal input of the integrator. The reference input is, in the case of the unipolar reference voltage, fed with that portion of this voltage which is equal to [Ri/(Ri+Rk)] Uu/2, or, in the case of the bipolar reference voltage, connected to ground. The width of the narrow pulse is equal to the period of the clock signal, while the width of the wide pulse is equal to (n-1) times the period of the clock signal.

REFERENCES:
patent: 3956700 (1976-05-01), Condon
patent: 4573037 (1986-02-01), Robinton et al.
patent: 4926178 (1990-05-01), Mallinson

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