Delta IDDQ testing

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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324763, G01R 3128

Patent

active

058894080

ABSTRACT:
A method for IDDQ testing to detect defects in a semiconductor device in the presence of a high background leakage current. In one embodiment at least a portion of a semiconductor device is biased and a first quiescent current measurement is taken. The portion of the semiconductor device that was biased is then unbiased and a second quiescent current measurement is taken. The first and second quiescent currents are then compared to determine if a defect exists in that portion of the semiconductor device.

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patent: 5519333 (1996-05-01), Righter
David G. Edwards, Testing For MOS Integrated Circuit Failure Modes, IEEE, Reprint from Proceedings International Test Conference 1980, pp. 303-312, (unavailable month).
Thomas M. Storey and Wojciech Maly, CMOS Bridging Fault Detection, IEEE, Reprint from Proceedings International Test Conference, 1990, pp. 325-334, (unavailable month).
Robert C. Atken, A Comparison of Defect Models For Fault Location With IDDQ Measurements, IEEE, Reprint from Proceedings International Test Conference 1992, pp. 335-344, (unavailable month).
Charles F. Hawkins and Jerry M. Soden, Electrical Characteristics and Testing Considerations For gate Oxide Shorts In CMOS ICs, IEEE, Reprint from Proceedings International Test Conference 1995, pp. 313-324, (unavailable month).

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