Delay time controller for use in a group-delay equalizer

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325431, H04B 106

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active

039421180

ABSTRACT:
A delay circuit provides a flat delay versus frequency characteristic over a first band of frequencies by combining two delay equalizers having opposite signed and equal magnitude slopes of delay versus frequency over two different bands of frequencies. The first frequency band is translated to a second band which is applied to the first of two delay equalizers. The latter has a transfer characteristic which is a substantially constant slope of delay versus frequency for a band encompassing and much wider than said second band. The output of the latter element is translated back to the first frequency band. The first band, either prior to the initial frequency translation or subsequent to the second frequency translation, is applied to a second delay equalizer. The characteristic slopes of the two delay equalizers are of substantially equal magnitude but of opposite sign.

REFERENCES:
patent: 2633492 (1953-03-01), Ring
patent: 3019296 (1962-01-01), Schelleng
patent: 3119067 (1964-01-01), Wohlenberg et al.
patent: 3183447 (1965-05-01), Fair

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