Delay time calibration circuit and method

Measuring and testing – Instrument proving or calibrating – Timing apparatus

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Details

333139, G01R 3328

Patent

active

058116559

ABSTRACT:
A delay time calibration circuit reduces timing skews among a plurality of test channels of a semiconductor test system for testing a semiconductor device. The delay time calibration circuit includes: a plurality of calibration loops each of which includes one of the test channels, each of the calibration loop has a variable delay element; a pulse generator which provides a pulse signal to each of the calibration loops; a measuring circuit for measuring the signal propagation delay time in each of the calibration loops by monitoring a propagation delay time of the pulse signal in the calibration loop; where each of the calibration loops includes an output terminal of a pin electronics board for each of the test channels which supplies a test signal to said semiconductor device at the output terminal, and where the variable delay element is adjusted so that the signal propagation delay in each of the calibration loops becomes a constant value based on the value measured by the measuring circuit.

REFERENCES:
patent: 4497056 (1985-01-01), Sugamori

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