Delay signal generator circuit and memory system including...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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C327S277000

Reexamination Certificate

active

07154322

ABSTRACT:
A delay signal generator circuit is provided. A delay circuit including a plurality of series-connected inverters for sequentially delaying a first clock signal and for generating a plurality of delay signals and a multiplexer for selecting one of the delay signals. A delay control circuit samples the selected delay signal in response to a transition of a second clock signal. The second clock signal has twice the frequency of the first clock signal, and the delay control circuit controls the delay circuit based upon the sampled value(s) so that the selected delay signal output from the delay circuit has a delay time of ¼ clock cycle relative to the first clock signal.

REFERENCES:
patent: 6847241 (2005-01-01), Nguyen et al.
patent: 6876239 (2005-04-01), Bell
patent: 6949958 (2005-09-01), Zerbe et al.
patent: 6999547 (2006-02-01), Braceras et al.
patent: 2001/0026183 (2001-10-01), Kim
patent: 2003/0001634 (2003-01-01), Cao et al.
patent: 2006/0066368 (2006-03-01), Gabato et al.

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