Delay locked loop in synchronous semiconductor memory device...

Details Delay locked loop in synchronous semiconductor memory device... Delay locked loop in synchronous semiconductor memory device...

2006-09-28

2009-02-10

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

07489170

ABSTRACT:
A semiconductor memory device including a delay locked loop can minimize current consumption during a precharge power down mode. The delay locked loop includes a buffer control block for generating a clock buffer enable signal in response to first and second signals, wherein the first signal represents a precharge power down mode and the second signal represents a reset of the delay locked loop, a clock buffering block, controlled by the clock buffer enable signal, for buffering an external clock to generate a reference clock, and a feedback loop for delaying the reference clock until a delay locking state to thereby output a DLL output clock.

REFERENCES:
patent: 6525578 (2003-02-01), Ooishi
patent: 6525988 (2003-02-01), Ryu et al.
patent: 6677791 (2004-01-01), Okuda et al.
patent: 6836437 (2004-12-01), Li et al.
patent: 7046061 (2006-05-01), Kwak
patent: 2003/0052719 (2003-03-01), Na
patent: 2004/0212406 (2004-10-01), Jung
patent: 2006/0020835 (2006-01-01), Samson et al.
patent: 2007/0085581 (2007-04-01), Ku
patent: 10-2003-0092506 (2003-12-01), None
patent: 10-2004-0100249 (2004-12-01), None
patent: 10-2005-0013737 (2005-02-01), None
Korean Office Action, with Partial English Translation, issued in Corresponding Korean Patent Application No. KR 10-2006-0049128, dated on Jul. 30, 2007.

Affiliated with

Also associated with

Rating

Delay locked loop in synchronous semiconductor memory device... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Delay locked loop in synchronous semiconductor memory device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delay locked loop in synchronous semiconductor memory device... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4093475