Delay locked loop in semiconductor memory device and method...

Details Delay locked loop in semiconductor memory device and method... Delay locked loop in semiconductor memory device and method...

2008-05-06

2008-05-06

Richards, N. Drew (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S159000

Reexamination Certificate

active

07368964

ABSTRACT:
Provided are a delay locked loop (DLL) and a method for generating a divided clock therein. In the DLL, a width of a reference frequency for phase comparison can be changed depending on a magnitude of an operating frequency. In the DLL, a clock buffer receives a clock equal to an external clock and generates an internal clock. An enable clock generator generates a 1-period enable clock or a 2-period enable clock using a command signal generated for performing a predefined operation. The command signal is generated according to an address command signal inputted from an exterior. A clock divider divides the internal clock to generate a divided clock. The divided clock is controlled by the 1-period enable clock or the 2-period enable clock, such that the divided clock is made to be a 1-period based dividing clock or a 2-period based dividing clock.

REFERENCES:
patent: 5256980 (1993-10-01), Itri
patent: 6011732 (2000-01-01), Harrison et al.
patent: 6539072 (2003-03-01), Donnelly et al.
patent: 6768690 (2004-07-01), Kwon et al.
patent: 6819603 (2004-11-01), Jones et al.
patent: 6828835 (2004-12-01), Cho
patent: 6876158 (2005-04-01), Trostl et al.
patent: 2003-132680 (2003-05-01), None
patent: 2003-272379 (2003-09-01), None
patent: 2004-0001434 (2004-01-01), None
patent: 2004-0046325 (2004-06-01), None

Affiliated with

Also associated with

Rating

Delay locked loop in semiconductor memory device and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Delay locked loop in semiconductor memory device and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delay locked loop in semiconductor memory device and method... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2799714