Delay locked loop having phase comparator

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By phase

Reexamination Certificate

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C327S156000

Reexamination Certificate

active

06894539

ABSTRACT:
A delay locked loop features a phase comparator. The phase comparator compares a phase of a reference clock signal obtained by dividing a buffered external clock signal with a phase of a feedback clock signal considering delay time of delay lines and inside circuits, and controls a shift register for controlling the delay lines in response not only a rising clock signal outputted from a clock buffer but also a falling clock signal depending on the comparison result, thereby rapidly locking an initial phase and tracking the phase in spite of fast delay variations by external noises.

REFERENCES:
patent: 5935257 (1999-08-01), Nishimura
patent: 5936912 (1999-08-01), Kawabata et al.
patent: 6037813 (2000-03-01), Eto et al.
patent: 6593786 (2003-07-01), Jung
patent: 6768690 (2004-07-01), Kwon et al.
patent: 6822494 (2004-11-01), Kim

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