Delay locked loop for detecting the phase difference of two sign

Details Delay locked loop for detecting the phase difference of two sign Delay locked loop for detecting the phase difference of two sign

1995-04-04

1997-03-11

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327147, 327145, 327244, 327276, H03L 706, H03K 513

Patent

active

056105436

ABSTRACT:
A delay locked loop (44) includes an arbiter circuit (86), a VCD circuit (85), and a collapse detector (88). The arbiter circuit (86) receives an input signal and provides a retard signal to adjust the amount of propagation delay of VCD circuit (85), in order to synchronize the phases of the input signal to an output signal of the VCD circuit (85). The collapse detector (88) detects if the output signal of the VCD circuit (85) has failed to change logic states within a predetermined length of time. The delay locked loop (44) can lock the phases of two signals having different frequencies.

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