Delay-locked loop for data recovery

Pulse or digital communications – Receivers – Angle modulation

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375376, 375361, 341 70, H03D 322

Patent

active

059995769

ABSTRACT:
A delay-locked loop which phase-locks the reference clock of crystal oscillation by certain identical delay units for generating certain precise time-sharing phase signals. These time-sharing phase signals can be utilized to recover the clock/data. The advantages of the invention, when comparing with the typical phase-locked loop, are: (1) it can be easily stabilized; (2) the phase error does not accumulate; (3) the loop filter requires only one capacitor, which reduces the area of chip; (4) no additional loop filter is need in multiport application, which further reduces the area of chip.

REFERENCES:
patent: 4167760 (1979-09-01), Decker
patent: 4853943 (1989-08-01), Laws
patent: 5726650 (1998-03-01), Yeoh et al.
patent: 5734301 (1998-03-01), Lee et al.
patent: 5801570 (1998-09-01), Mizuno et al.

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