Delay locked loop (DLL) circuit for generating clock signal...

Details Delay locked loop (DLL) circuit for generating clock signal... Delay locked loop (DLL) circuit for generating clock signal...

2007-06-29

2009-10-20

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S144000, C327S147000, C327S154000, C327S155000, C327S161000

Reexamination Certificate

active

07605624

ABSTRACT:
A delay locked loop (DLL) circuit is disclosed. The DLL circuit includes a first delay locked loop (DLL) configured to receive a plurality of first clock signals, delay each of the first clock signals by a predetermined period of time in response to a first control signal, and generate a plurality of first internal clock signals and a second delay locked loop (DLL) configured to receive the first internal clock signals, delay the first internal clock signals by a predetermined period of time in response to a second control signal, and generate a plurality of second internal clock signals.

REFERENCES:
patent: 6218876 (2001-04-01), Sung et al.
patent: 6765421 (2004-07-01), Brox et al.
patent: 6894539 (2005-05-01), Kim
patent: 6956418 (2005-10-01), Kwak et al.
patent: 7154978 (2006-12-01), Juan et al.
patent: 7414443 (2008-08-01), Jacobsson et al.
patent: 7423465 (2008-09-01), Gomm
patent: 10-1998-0078161 (1998-11-01), None
patent: 10-2003-0000477 (2003-01-01), None
patent: 10-2004-0020990 (2004-03-01), None
patent: 10-2004-0037786 (2004-05-01), None
patent: 10-2005-0089474 (2005-09-01), None

Affiliated with

Also associated with

Rating

Delay locked loop (DLL) circuit for generating clock signal... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Delay locked loop (DLL) circuit for generating clock signal..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delay locked loop (DLL) circuit for generating clock signal... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4100075