Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform
Reexamination Certificate
2006-09-19
2006-09-19
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Having specific delay in producing output waveform
C327S158000
Reexamination Certificate
active
07109774
ABSTRACT:
A delay line unit of a delay locked loop (DLL) circuit, includes a first delay line having a plurality of first unit delays, each first unit delay having a first delay; a second delay line having a plurality of second unit delays, each second unit delay having a second delay; and a third delay line having a plurality of third unit delays, each third unit delay having a third delay, wherein the first delay is shorter than the second delay, and the second delay is shorter than the third delay.
REFERENCES:
patent: 4218705 (1980-08-01), Inaba et al.
patent: 5457719 (1995-10-01), Guo et al.
patent: 6101197 (2000-08-01), Keeth et al.
patent: 6173432 (2001-01-01), Harrison
patent: 6252443 (2001-06-01), Dortu et al.
patent: 6314052 (2001-11-01), Foss et al.
patent: 6339354 (2002-01-01), Heightley
patent: 6346839 (2002-02-01), Mnich
patent: 6349122 (2002-02-01), Woodman, Jr.
patent: 6359487 (2002-03-01), Heightley et al.
patent: 6469559 (2002-10-01), Heightley
patent: 6490224 (2002-12-01), Manning
patent: 6628155 (2003-09-01), Park et al.
patent: 6801472 (2004-10-01), Lee
patent: 6836166 (2004-12-01), Lin et al.
patent: 6839301 (2005-01-01), Lin et al.
patent: 06-188700 (1994-07-01), None
patent: 2002-076861 (2002-03-01), None
patent: 1020040050539 (2004-06-01), None
Blakely & Sokoloff, Taylor & Zafman
Callahan Timothy P.
Cox Cassandra
Hynix / Semiconductor Inc.
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