Delay-Locked Loop (DLL) capable of directly receiving...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S153000

Reexamination Certificate

active

07057433

ABSTRACT:
A delay-locked loop (DLL) capable of directly receiving external clock signals is provided. The DLL comprises a level selector, a control signal generator, and an internal clock signal generator. The level selector receives an external clock signal, and directly outputs the external clock signal, or changes a level of the external clock signal and outputs a changed external clock signal, in response to a control signal. The control signal generator generates the control signal. The internal clock signal generator receives an output signal of the level selector and the external clock signal, and generates an internal clock signal synchronized to a phase of an output signal of the level selector.

REFERENCES:
patent: 6404248 (2002-06-01), Yoneda
patent: 6661265 (2003-12-01), Partsch et al.
patent: 6680635 (2004-01-01), Lee
patent: 6815985 (2004-11-01), Jeon

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