Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2006-12-29
2009-08-11
Donovan, Lincoln (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S149000
Reexamination Certificate
active
07573308
ABSTRACT:
A Delay Locked Loop (DLL) circuit prevents a malfunction caused by a change of a power supply voltage, and includes a first and a second delay lines and a first and a second signal processors for controlling the first and the second delay lines, and turns off the second signal processor after DLL locking. The DLL circuit further includes a phase comparator for generating a comparison signal notifying which of phases of a first clock signal of the first delay line and a second clock signal of the second delay line precedes the other, and a signal selector for inputting an output of the second signal processor to the second delay line before the DLL locking, and inputting the comparison signal of the phase comparator to the second delay line after the DLL locking.
REFERENCES:
patent: 4758821 (1988-07-01), Nelson et al.
patent: 6075832 (2000-06-01), Geannopoulos et al.
patent: 6486716 (2002-11-01), Minami et al.
patent: 6518807 (2003-02-01), Cho
patent: 6774690 (2004-08-01), Baker et al.
patent: 7046059 (2006-05-01), Kwak
patent: 7057431 (2006-06-01), Kwak
patent: 7233183 (2007-06-01), Sancheti
patent: 7336752 (2008-02-01), Vlasenko et al.
patent: 7348823 (2008-03-01), Takai et al.
patent: 7358784 (2008-04-01), Kim et al.
patent: 2003/0218486 (2003-11-01), Kwak
patent: 2004/0113665 (2004-06-01), Joet et al.
patent: 2004/0125905 (2004-07-01), Vlasenko et al.
patent: 2004/0130366 (2004-07-01), Lin et al.
patent: 2004/0217789 (2004-11-01), Kwak et al.
patent: 2005/0093597 (2005-05-01), Kwak
patent: 2005/0093600 (2005-05-01), Kwak
patent: 2007/0069781 (2007-03-01), Kim et al.
patent: 2007/0069783 (2007-03-01), Ku et al.
patent: 2007/0085581 (2007-04-01), Ku
patent: 2008/0042705 (2008-02-01), Kim et al.
patent: 2008/0180149 (2008-07-01), Byun
patent: 2004-056172 (2004-02-01), None
patent: 10-2004-0041985 (2004-05-01), None
patent: 10-2004-0095981 (2004-11-01), None
patent: 10-2005-0048838 (2005-05-01), None
Notice of Allowance issued in Korean Patent Application No. KR 10-2006-0080713, dated on May 29, 2008.
Donovan Lincoln
Houston Adam D
Hynix / Semiconductor Inc.
Mannava & Kang P.C.
LandOfFree
Delay locked loop circuit for preventing malfunction caused... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Delay locked loop circuit for preventing malfunction caused..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delay locked loop circuit for preventing malfunction caused... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4053616