Delay locked loop circuit and operation method thereof

Details Delay locked loop circuit and operation method thereof Delay locked loop circuit and operation method thereof

2011-04-26

2011-04-26

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

07932758

ABSTRACT:
A delay locked loop circuit includes a delay replica model unit for reflecting a delay time of an actual output path to a source clock and outputting the reflected source clock as a delay replica clock, a detector for detecting a remaining time after subtracting a time corresponding to a multiple of a clock cycle of the source clock from a time corresponding to a phase difference between the delay replica clock and the source clock, and a delay locking unit for delaying the source clock for a delay time to synchronize a clock generated by delaying the source clock for the detected remaining time of the detector with a phase of the source clock.

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Notice of Allowance issued from Korean Intellectual Property Office on Feb. 21, 2011.

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